Semiconductor wiring substrates are, as is generally known, formed by laminating at least a dielectric layer (insulation layer) on a silicon wafer or the like. A patterned conductive layer (i.e., a wiring layer) is then formed in the dielectric layer to form a semiconductor wiring structure.
The formation of the wiring layer is carried out as follows. First, a conductive layer is formed on a dielectric layer uniformly, and a resist film is formed on this conductive layer. A resist pattern is formed by irradiating (exposing) this resist film with a patterning light, followed by development, and a wiring layer is formed by patterning of the conductive layer with an etching process using the resist pattern as a mask. Then, after removing the resist film completely, a dielectric layer is further laminated on the conductive layer to configure a wiring layer in the dielectric layer.
It has been conventionally known that a problem referred to as a stationary wave effect due to multiple interference occurs when a pattern is formed by irradiating a resist film with light in the step of forming a wiring layer. That is, irradiated light is transmitted through the resist film, and the transmitted light is reflected on an underlayer surface and a part of the reflected light is further reflected on an upper surface of the resist film, with such event being repeated in the resist film. As a result of interference between light irradiated at a single wavelength, which has entered the resist film formed on the substrate, and light reflected from the substrate, variation in the amount of light energy absorbed in a thickness direction of the resist film occurs. This variation affects a size width of the resist pattern obtained after development, resulting in a reduction of the dimensional accuracy of the resist pattern.
This reduction in the dimensional accuracy of the resist pattern is of significant concern, particularly when a fine pattern is formed on a substrate having varying levels because the thickness of the resist film becomes inevitably different at the relief structures in portions having such varying levels. Thus, it has been desired to develop a technology in which the above interference effect is eliminated and the dimensional accuracy of the resist pattern is not reduced even in the case of fine patterns formed on a substrate having varying levels.
Consequently, a method in which an anti-reflection film having a property of absorbing the exposed light is formed before forming a resist film on a substrate and a resist film is formed on the anti-reflection film (for example, Patent Document 1, etc.); and a method in which an anti-reflection film constituted with polysiloxane, polyvinyl alcohol or the like is formed on a resist film provided on a substrate (for example, Patent Documents 2 and 3, etc.) have been employed conventionally.    Patent Document 1: U.S. Pat. No. 4,910,122.    Patent Document 2: Japanese Examined Patent Application Publication No. H04-55323.    Patent Document 3: Japanese Unexamined Patent Application Publication No. H03-222409.